1. Field of the Invention
The present invention relates in general to an apparatus for measuring a time interval between two signal edges and in particular to an apparatus employing clock signals of a delay-locked loop delay line as timing references.
2. Description of Related Art
One known system for measuring a time interval between two signal edges employs a crystal oscillator producing a clock signal having a stable, predictable frequency and a counter for counting pulses of the clock signal and producing output data representing its count. A "start" signal edge connects the clock signal to the counter so that it may begin counting clock signal pulses. A "stop" signal edge thereafter disconnects the clock signal from the counter so that it stops counting clock signal pulses. The value represented by the ending count, multiplied by the period of the clock signal, equals the interval between the start and stop signal edges. Unless the start and stop signal pulses happen to be synchronized to clock signal pulses, the error in the interval measurement can be as large as the period of the clock signal output of the crystal oscillator. Thus some other means for measuring a time interval is needed if we want to reduce the measurement error to a value that is smaller than the period of the crystal oscillator.
U.S. Pat. No. 5,847,590 issued Dec. 8, 1998 to Yanazaki and U.S. Pat. No. 5,289,135 issued Feb. 22, 1994 to Hoshino et al describe interval measurement devices that employ a ring oscillator to produce N clock signals having the same period P but which are evenly distributed in phase so as to divide the clock signal period in to N equal segments. A ring oscillator consists of a set of inverting logic gates connected in a loop with each gate passing a pulse arriving from a preceding gate to a next gate within the loop. When the loop is closed, a signal edge circulates through the loop, changing the signal state at each successive gate's output. The N clock signals are derived at the outputs of the gates forming the loop. Each clock signal oscillates with the frequency at which the signal edge circulates through the loop and with a phase that depends on the position in the loop of the gate generating the clock signal. The phase shift from one clock signal to the next is equal to the switching speed of that gate producing it. When the gates all have the same switching speed, the clock signals phases are evenly distributed.
In the systems described above, the START signal pulse closes the loop thereby causing a pulse to begin circulating through the gates and triggering production of the N output clock signals. Thereafter a counter counts cycles of one of the N clock signals until a STOP signal edge halts the count. At that point the counter output data indicates a whole number of clock signal cycles that elapsed between the START and STOP signal edges. The states of oscillator's N output clock signals form an N-bit data word representing a fractional portion of a clock cycle that may be added to the whole number of clock cycles represented by the counter output to determine the interval between the START and STOP signal edges.
Assuming the clock signal period is stable and predictable, these systems can measure a time interval between two signal edges to within about 1/Nth of the period of the ring oscillator's clock signals. However the clock signal period of a free-running ring oscillator depends on the switching speed of each gate forming the oscillation, and that switching speed is neither stable nor predictable. Since a logic gate's switching speed depends in part on the nature of the semiconductor material forming it, natural process variations occurring in that semiconductor material make it difficult to accurately predict the speed of the gate. A logic gate's switching speed is also influenced by its operating environment including its temperature and power supply level which can vary unpredictably. Thus the accuracy with which the systems described above can measure a time interval between the START and STOP signal edges is adversely affected by unpredictability in the period of the ring oscillator's output signal due to unpredictable process and environmental variations influencing the switching speed of the gates forming the oscillator.
What is needed is an apparatus for measuring a time interval between two signal edges using a stable, predictable clock signal as a timing reference, and which can measure that time interval with an error that is much smaller than the period of the clock signal.